KMS Chongqing Institute of Green and Intelligent Technology, CAS
Research on power efficient methodology for GALS multiprocessors | |
Duan, Wei1,3; Fan, Qifei1; Huang, Kun1; Zhang, Ge2,4 | |
2011 | |
摘要 | In consideration of the facts that the advent of the era of multi-core makes the power consumption being the first restriction on microprocessor design, and the globally asynchronous locally synchronous (GALS) design of distributed clock networks can excellently improve the power efficiency of single-chip multiprocessors (CMPs) using the dynamic voltage and frequency scaling (DVFS) policy, this paper proposes a new voting based DVFS algorithm for the CMPs using the GALS technology. The new algorithm dynamically adjusts the voltage and the frequency of processors according to the information of architecture and program behaviors. The experimental results show that the proposed algorithm can reduce the power consumption of 24.8%, while just causing the performance loss of 9.9%. |
DOI | 10.3772/j.issn.1002-0470.2011.12.003 |
发表期刊 | Gaojishu Tongxin/Chinese High Technology Letters |
ISSN | 10020470 |
卷号 | 21期号:12页码:1232-1239 |
通讯作者 | Zhang, G. (gzhang@ict.ac.cn) |
收录类别 | EI |
语种 | 中文 |